In this role, the candidate will become one of the major contributors to developing next generation ECC technology for data storage applications. You are expected to participate in developing, modeling, simulating, and working with designers in implementing the algorithms.
Ability to read and understand the latest in the literature on Error Correcting Code (ECC) algorithms.
Ability to model ECC algorithms such as LDPC and signal processing algorithms in a development environment to study the benefits of any given algorithm with reference to certain metrics.
Knowledge of NAND flash devices and SSD is a plus.
Verification of the performance of ECC algorithms on the latest NAND flash and SSD.
Several years of industry experience in either HDD or SSD data storage industry is a plus.
Knowledge of C/C++ and Matlab.
Experience with scripting languages is a plus.
Strong problem solving, debugging, analytical skills.
The candidate will be involved in developing storage chipsets. The work requires participation in understanding, modeling various ECC algorithms in C/C++/Matlab environment for generating both BER v. SNR plots as well as working with hardware/firmware teams in implementing the algorithms. The work also involves supporting verification, circuit, and test groups throughout design cycle and silicon bring up. Occasional international travels may be required.
Ph.D or other advanced degree in ECC area with a focus toward modeling and simulation.
Relevant industrial experience preferred.
Goke US Research Laboratory 4655 Old Ironsides Dr, #350
Santa Clara, CA 95054