In this critically visible role, the candidate will lead the FPGA design, synthesis and testing. He will also be responsible for the HW laboratory and expected to innovate the process of testing and measurements for both FPGA and ASIC platforms.
BSEE or MSEE, with at least 5 years of experience in implementing high speed Xilinx FPGA designs.
Prior work in high speed PCB designs.
Knowledge of Signal and Power Integrity and ability to debug signal integrity issues.
Strong problem solving, debugging, analytical skills.
Understanding of PCIe and DDR interfaces.
Knowledge of Python and C++.
Experience in ARM based SOCs.
Knowledge of NVMe SSDs is a plus.
Develop FPGA Products that operate at ~500MHz.
Support FPGA Prototyping of ASIC projects.
High speed PCB designs.
Participate in defining functional specification with the architect and RTL engineers.
Support FPGA synthesis, floor planning, and HW testing.
System design (mechanical, power, cooling, compliance).
Oversee laboratory equipment.
Occasional international travels is required.
Bachelor's degree (B. A.) with at least 10-year work experience.
Master’s degree with at least 5-year work experience.
Goke US Research Laboratory 4655 Old Ironsides Dr, #350
Santa Clara, CA 95054