Architecture definition of SSD controller SOCs used with enterprise and hyperscale systems.
Recognized expert in Enterprise SoCs architecture and micro-architecture, SOC design flow and methodology.
Hands-on experience in SOC transport protocols, e.g. AMBA, APB.
Experience in SOC power modeling, hardware power simulation and analysis flow, low power design and power optimization.
Expertise on the power impact at architecture, logic design, and circuit levels.
The successful candidate will be responsible for defining the SOC ASIC architecture and working closely with design, verification, hardware, and firmware teams. After initial definition phase, he will perform checks on quality of design, progress of hardware validation as well coordination of bringup phase. He must be also able to fill in for at least one of the above teams in a hands-on approach if the situation calls for.
10 years minimum experience in embedded systems design with prior leadership and architecture position coverage.
Goke US Research Laboratory 4655 Old Ironsides Dr, #350
Santa Clara, CA 95054